Picture of Michael Tempelmeier

M.Sc. Michael Tempelmeier

Technical University of Munich

Chair of Security in Information Technology (Prof. Sigl)

Postal address

Postal:
Theresienstr. 90
80333 München

Research

Currently I am focusing on benchmarking hardware implementations of CAESAR and NIST LWC candidates.

Student Jobs

VHDL Development

Teaching

Summer 2019:

Lab Crypto Implementation

Winter 2018:

Lab Crypto Implementation

Summer 2018:

Applied Cryptology

Lab Crypto Implementation

Winter 2017:

Lab Crypto Implementation

Summer 2017:

Applied Cryptology

Winter 2016:

Seleted Topics in System Security

Winter 2015: 

Selected Topics in System Security

Winter 2014:

Selected Topics in System Security

Publications

M. Gruber, M. Probst and M. Tempelmeier, "Persistent fault analysis of OCB, DEOXYS and COLM", Fault Diagnosis and Tolerance in Cryptography, Atlanta, USA, 2019

S. Payandeh Azad, M. Tempelmeier, G. Jervan, and J. Sepulveda, "CAESAR-MPSoC: Dynamic and Efficient MPSoC Security Zones", 2019 IEEE Computer Society Annual Symposium on VLSI Miami, Florida, U.S.A., J 2019

M. Tempelmeier, M. Werner, and G. Sigl, "Using Hardware Software Codesign for Optimised Implementations of High-Speed and Defence in Depth CEASAR Finalists," 2019 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), Washington, DC, USA, 2019

M. Tempelmeier, G. Sigl and J. Kaps, "Experimental Power and Performance Evaluation of CAESAR Hardware Finalists," 2018 International Conference on ReConFigurable Computing and FPGAs (ReConFig), Cancun, Mexico, 2018, pp. 1-6. doi: 10.1109/RECONFIG.2018.8641740

M. Tempelmeier, F. De Santis, G. Sigl and J. Kaps, "The CAESAR-API in the real world — Towards a fair evaluation of hardware CAESAR candidates," 2018 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), Washington, DC, USA, 2018, pp. 73-80. doi:10.1109/HST.2018.8383893

M. Tempelmeier and G. Sigl. "MaskVer: a tool helping designers detect flawed masking implementations." Verification and Security Workshop (IVSW), IEEE International. IEEE, 2016.

M. Tempelmeier, F. De Santis, J. Kaps and G. Sigl: "An Area-Optimized Serial Implementation of ICEPOLE Authenticated Encryption Schemes.", IEEE International Symposium on Hardware Oriented Security and Trust (HOST), 2016Washington D.C. Metropolitan Area, VA, USA

S. Wallentowitz, M. Tempelmeier, T. Wild, A. Herkersdorf, "Network-on-Chip Protection Switching Techniques for Dependable Task Migration on an Open Source MPSoC Platform", edaWorkshop14, 27-32, May 13-14, 2014

S. Wallentowitz, P. Wagner, M. Tempelmeier, T. Wild, A. Herkersdorf, "Open Tiled Manycore System-on-Chip", ArXiv.org, 2013 (ext. Link...)